A Unified Test and Debug Platform for SOC Design

摘要：

As the complexity of System-on-a-Chip (SOC) design keeps growing rapidly,efficient and economic testing and debugging for complex circuits at silicon stage has become extremely important.In this paper we present a unified platform that facilitates efficient on-chip testing and silicon debugging in a PC-based environment. Test techniques including scan and BIST,and debug functions including online tracing,hardware breakpoint insertion and cycle-based single-stepping, are supported in this platform. An automatic design tool is also developed to simplify the generation and application of the platform.With this platform users can easily carry out structural testing with the scan or BIST test mode,functional verification with the on-line tracing mode,and fault diagnosis with the single-step mode.

关键词： SOC testing silicon debug debug platform

作者: Kuen-Jong Lee Chin-Yao Chang Alan Su Si-Yuan Liang

作者单位: National Cheng Kung University,Taiwan Global Unichip Corp.,Taiwan

会议类型: 国际会议

会议名称: 2009 IEEE 8th International Conference on ASIC(第八届IEEE国际专用集成电路大会)

会议地点: 长沙

会议语种:英文

页码: 577-580

在线出版日期: 2009-10-20（万方平台首次上网日期，不代表论文的发表时间）