ISTA:An Embedded Architecture for Post-silicon Validation in Processors

摘要：

In this paper,we present a new architecture for post-silicon validation called ISTA, Internal Signal Trace Analysis. The objective of ISTA is to give the bug location, including the occurring time and place,during post-silicon validation.ISTA consists of an Error Detector,several hardware probes called Signal Trace Probes (STPs) which are embedded in the chip,and an off-chip Instruction Set simulator(ISS).During post-silicon validation,the information acquired by STPs is analyzed to detect whether an error has occurred and if occurred, give the occurring time and place of the bug.ISTA offers us the ability to detect errors and locate bugs at real-time,fault-tolerant debug,great debug flexibility,and some other advantages.Synthesis results show that the hardware cost of ISTA is at a reasonable level.

关键词： Post-silicon Validation Verification Signal Trace Design for Debug

作者: Ting Lei Hu He Yihe Sun

作者单位: Institute of Microelectronics,Tsinghua University and Tsinghua National Laboratory of Information an Institute of Microelectronies,Tsinghua University and Tsinghua National Laboratory of Information an

会议类型: 国际会议

会议名称: 2009 IEEE 8th International Conference on ASIC(第八届IEEE国际专用集成电路大会)

会议地点: 长沙

会议语种:英文

页码: 593-596

在线出版日期: 2009-10-20（万方平台首次上网日期，不代表论文的发表时间）