A Response Compactor for Eztended Compatibility Scan Tree Construction

摘要：

Though test application time and test power is reduced drastically in the extended compatibility scan tree,the number of output is too large. This paper proposes a response compactor to reduce its output number as well as the test response data volume. This compactor is composed by an XOR network.Exploring the characteristic of extended compatibilities and the structure information of the circuit under test,it can effectively solve error diffusion problem,and achieves low hardware overhead. Experimental results show the applicability of the response compactor. As for the ISCAS89 benchmark circuits,the compactor can have the highest compression ratio to 77 while keeping the same fault coverage.

关键词： design for testability full scan testing scan tree test response compaction XOR network

作者: Zhiqiang You Jiedi Huang Michiko Inoue Jishun Kuang Hideo Fujiwara

作者单位: Software School,Hunan University,Changsha,410082 China School of Computer and Communication,Hunan University,Changsha,410082 China Nara Institute of Science and Technology,Ikoma,Nara 630-0192,Japan

会议类型: 国际会议

会议名称: 2009 IEEE 8th International Conference on ASIC(第八届IEEE国际专用集成电路大会)

会议地点: 长沙

会议语种:英文

页码: 609-612

在线出版日期: 2009-10-20（万方平台首次上网日期，不代表论文的发表时间）