A Scan Chains Combined-Balance Strategy for Hierarchical SoC DFT
Intellectual Property (IP) cores reused technology improves System-on-a-Chip (SoC) design productivity.However, with more IP cores embedded in the deeper levels,the hierarchical architecture of soC becomes complex,which also makes the test difficult. A Scan Chains Combined-Balance (SCCB) strategy is proposed in this paper to reconfigure and balance the scan chains,which helps reduce test time and overhead. The SCCB strategy is different from the traditional test method,wherein the Test Access Mechanism (JAM) and Scheduling are established as a virtual flattened form.We take experiments to verify the SCCB strategy based on the ITC02 benchmarks. The experimental results show that the SCCB strategy is effective.
DFT SCCB hierarchical structure SoC
Jinyi Zhang Dong Zhang Xiaodong Yang Yi Yang
Key Laboratory of Advanced Displays and system Application,and Key Laboratory of Special Fiber Optic School of Communication and Information Engineering,Shanghai University Microelectronic Research & Development Centre,Shanghai University
国际会议
2009 IEEE 8th International Conference on ASIC(第八届IEEE国际专用集成电路大会)
长沙
英文
617-620
2009-10-20(万方平台首次上网日期,不代表论文的发表时间)