Verilog-A Based Implementation for Coupled Model of Single Event Transients in Look-Up Table Technique

摘要：

A Verilog-A based implementation of voltage coupled model is developed for Single-Event Transients (SETs) in microelectronic circuits.By implementing a look-up table in Verilog-A,the SET current source performs well and consents with the results from Technology CAD (TCAD) based mix-mode simulation.Simulation results from Synopsys Hspice 2008 indicates that the method proposed in this paper correctly reveals the current tail which reflects the equilibrium course of charge collection.Moreover,the Verilog-A based method speeds up the simulation by over 18,000 times than the mix-mode simulation and is also faster than the piecewise linear source (PWL). Furthermore,this Verilog-A based LUT method cooperates with the design flow well and can be easily applied to various applications with wide supports of industrial EDA tools.

关键词： Single-event transient Verilog-A look-up table voltage coupled model

作者: Zhao Xueqian Zhao Zhenyu Zhang Minxuan Li Shaoqing

作者单位: Computer School of National University of Defense Technology,Changsha,Hunan,410073,P.R.China

会议类型: 国际会议

会议名称: 2009 IEEE 8th International Conference on ASIC(第八届IEEE国际专用集成电路大会)

会议地点: 长沙

会议语种:英文

页码: 666-669

在线出版日期: 2009-10-20（万方平台首次上网日期，不代表论文的发表时间）