Implementation of High-speed Verification Platform Based on Emulator For ReDSP and ReMAP
Verification of processors with high performance is becoming more and more time-consuming and even gradually turning into the bottleneck of the processor design. The Verification of Reconfiguralbe Multimedia Array Processor(ReMAP) we designed for multimedia processing and its internal component Reconfigurable DSP(ReDSP) is also no e ception. A high-speed verification platform based on emulator is proposed for ReDSP and ReMAP.We demonstrate the hardware architecture of the platform and different verification modes it supports. A software verification model is proposed,and the evaluation results show a great acceleration rate compared to software simulation.
verification emulator software simulation
Huang Wei Wang Xinan Dai Peng Guo heng
Peking University,Shenzhen Graduate School as a graduate student.He is now with the Key Lab of Integ Peking University,Shenzhen Graduate School as assistant professor.He is now the director of the Key Mentor Graphics Corporation
国际会议
2009 IEEE 8th International Conference on ASIC(第八届IEEE国际专用集成电路大会)
长沙
英文
682-685
2009-10-20(万方平台首次上网日期,不代表论文的发表时间)