The Chip Verification Method Based on Memory Monitoring

摘要：

a verification method based on memory monitoring is proposed for harmonizing the execution of RTL simulator and system-level model (SLM) simulator,in the situation that the SLM is a black-box to the designers. This method can quickly and efficiently find the differences of big benchmarks executing process between the RTL simulation and SLM simulation,and help the verification engineers rapidly finding the bugs in the RTL codes and speedup the accomplishment of verification.

关键词： Memory Monitoring Verification Error Checking

作者: Sheng Liu Huanrong Yang Yong Li Shuming Chen

作者单位: National University of Defense Technology,Changsha,China

会议类型: 国际会议

会议名称: 2009 IEEE 8th International Conference on ASIC(第八届IEEE国际专用集成电路大会)

会议地点: 长沙

会议语种:英文

页码: 704-707

在线出版日期: 2009-10-20（万方平台首次上网日期，不代表论文的发表时间）