会议专题

Redundant Via Allocation for Layer Partition-based Redundant Via Insertion

The occurrence of via defects increases due to the shrinking size in integrated circuit manufacturing. Redundant via insertion is an effective and recommended method to reduce the yield loss caused by via failures.In this paper,we introduce a redundant via allocation problem for layer partition-based model and solve it using genetiC algorithm. The result of layer partition-based model depends on the partition and processing order of layers.With our redundant via allocation,it can be achieved independent of these factors.In our method,we first construct a graph to represent candidate relations between vias and redundant vias,and conflict relations between redundant vias because of design rule violations. Then the connected components of graph are computed. On each component,we can perform redundant via allocation on the boundaries of any layer partition.Genetic algorithm is used to optimize the allocation strategy.Experiment results show that our method can efficiently improve the redundant via insertion rate.

Redundant via double via design for manufacturability

Jian-Wei Shen Mei-Fang Chiang Song Chen Wei Guo Takeshi Yoshimura

Graduate School of IPS,Waseda University,Kitakyushu,808-0135,Japan

国际会议

2009 IEEE 8th International Conference on ASIC(第八届IEEE国际专用集成电路大会)

长沙

英文

734-737

2009-10-20(万方平台首次上网日期,不代表论文的发表时间)