Thermal Via Planning Aware Force-Directed Floorplanning for DICs

摘要：

The three-dimensional (3D) integration circuit is a new technology with higher integration density and better performance than 2D ICs. To solve the critical thermal issue in 3D layout,we propose a force-directed floorplanning algorithm. This algorithm naturally integrates with the planning of thermal vias and reasonably allocates white space for inserting the thermal vias.It solves the problem of the thermal distribution disturbance by the white space reassignment.Compare with the after-floorplanning thermal via planning algorithm,this algorithm decreases the number of thermal vias by 8.2% while increases the area by 3.5% on average.

关键词： Three-dimensional Integrated Circuits (3D ICs),Floorplanning Force-directed Thermal Via

作者: Yun Huang Qiang Zhou Yici Cai

作者单位: Department of Computer Science and Technology,Tsinghua University

会议类型: 国际会议

会议名称: 2009 IEEE 8th International Conference on ASIC(第八届IEEE国际专用集成电路大会)

会议地点: 长沙

会议语种:英文

页码: 751-753

在线出版日期: 2009-10-20（万方平台首次上网日期，不代表论文的发表时间）