Power Aware Design for Nezt Generations Many cores Computing Platforms

We describe a comprehensive set of design techniques, applicable at different levels of abstraction that have proven to bring great potential for power optimization in industrial embedded Multi-Processing platforms.
Ultra low power computing platform power optimization low power design leakage power system-level energy optimization Network on Chip Multi Processing architecture
Dr.Roberto Zafalon
STMicroelectronics,European R& D and Public Affairs.Via Olivetti 2,20041 Agrate Brianza,Italy
国际会议
2009 IEEE 8th International Conference on ASIC(第八届IEEE国际专用集成电路大会)
长沙
英文
777-779
2009-10-20(万方平台首次上网日期,不代表论文的发表时间)