An Efficient Verification and Test Scheme for Media Broadcasting Demodulator

摘要：

For the complex development process of media broadcasting demodulator chip,it is proposed that a low cost,high reliability verification and test scheme at system level in this paper. This scheme emphasizes the collaboration of algorithm simulation,RTL description, FPGA verification,ASIC realization and any other stages of chip development. All these stages constitute an organic,closely interconnected whole. And for the particularity of communication chip,this scheme can solve function verification and performance test,ensure the accuracy,completeness and reliability of the test and verification. Then both the development time and the cost of the product are significantly reduced. This verification and test scheme has been applied to the demodulation chip of the receiver of Chinese broadcasting standard DTMB system.

关键词： Broadcasting Reliability Verification and Test Scheme Low Cost

作者: Yun Chen Nan Shao Bo Xiang Dan Bao An Pan Xiaoyang Zeng

作者单位: State Key Lab.Of ASIC and System,Dept.of Microelectronics,Fudan University,Room 301.825Road Zhang Heng,Shanghai,China

会议类型: 国际会议

会议名称: 2009 IEEE 8th International Conference on ASIC(第八届IEEE国际专用集成电路大会)

会议地点: 长沙

会议语种:英文

页码: 800-804

在线出版日期: 2009-10-20（万方平台首次上网日期，不代表论文的发表时间）