会议专题

Research and Implementation of Parallel and Reconfigurable MICKEY Algorithm

A parallel and dynamic reconfigurable hardware architecture of MICKEY algorithm is proposed in this paper,which can satisfy the different characteristics of MICKEY-80,MICKEY-128 and MICKEY-128 2.0 algorithms. The three algorithms are exactly the same in design principle, so according to different reconfigurable parameters,they can be implemented in one chip. As to different parallel methods, detailed comparison and analysis are performed The design has been realized using Alteras FPGA.Synthesis,placement and routing of parallel and reconfigurable design have accomplished on 0.18μm CMOS process. The result proves the maximum throughput can achieve 1915.8 Mbps.

Parallel Reconfigurable MICKEY FPGA ASIC

LI Miao XU Jinfu DAI Zibin YANG Xiaohui QU Hongfei

Zhengzhou Information College,Zhengzhou,Henan,China,450004

国际会议

2009 IEEE 8th International Conference on ASIC(第八届IEEE国际专用集成电路大会)

长沙

英文

831-834

2009-10-20(万方平台首次上网日期,不代表论文的发表时间)