Design of Low-Power Complementary Pass Transistor and Ternary Adder Based on Multi-valued Switch-signal Theory

摘要：

Based on study of previous full adders,this paper proposed a novel ternary full adder(TFA),which are implemented by using switch-level design technology in CPL (Complementary Pass-Transistor Logic) structure.Compared with traditional TFA:the circuit structure is simplicity and regulation in symmetry structure;The circuit delay is balanced and the circuit speed is increased and the circuit area is reduced by using switch-level design technology. A new TRCA (Ternary Ripple Carry Adder) is designed based on these TFA. The PSPICE simulation results indicate: the novel scheme has correct logic function and the character of clearly low power.It is suitable for high performance and low-power VLSI design.

关键词： Low-power Multiple-value logic CPL adder switch-signal theory

作者: Xiaopang Zeng Pengjun Wang

作者单位: Institute of Circuits and Systems,Ningbo University,Ningbo 315211 China Institute of Circuits and Systems,Ningbo University,Ningbo 315211,China

会议类型: 国际会议

会议名称: 2009 IEEE 8th International Conference on ASIC(第八届IEEE国际专用集成电路大会)

会议地点: 长沙

会议语种:英文

页码: 851-854

在线出版日期: 2009-10-20（万方平台首次上网日期，不代表论文的发表时间）