A Pure Logic CMOS Based Low Power Non-Volatile Random Access Memory for RFID Application

摘要：

A 1.8V,0.18μm pure logic CMOS based low power non-volatile random access memory for RFId application is developed in this paper.Low power consumption is achieved based on a novel two-dimension architecture and a series of power optimization methods. Simulation result shows that the power consumption for read and write operations is less than 160μW and 560μW respectively. The merits make it suitable for low power RFID application.

关键词： Non-volatile random access memory CMOS two-dimension array architecture low power

作者: Yaru Yan Dong Wu Huijuan Liu Liyang Pan Jun Xu

作者单位: Institute of Microeletronics,Tsinghua University,100084,Beijing,China Institute of Microelectronics,and also with the Tsinghua National Laboratory for Information Science

会议类型: 国际会议

会议名称: 2009 IEEE 8th International Conference on ASIC(第八届IEEE国际专用集成电路大会)

会议地点: 长沙

会议语种:英文

页码: 1015-1018

在线出版日期: 2009-10-20（万方平台首次上网日期，不代表论文的发表时间）