An Ezperimental Eztracted Model for Latchup Analysis in CMOS Process
The latchup phenomenon is analyzed theoretically. A practical analytical model derived from Ebers-Moll formulations is proposed to analyze,simulate,and predict latchup,with favorable legitimacy and flexibility. The model parameters are extracted on 0.25um CMOS process from experiments. The extracted model can predict latchup successfully in circuit level when applied in SPICE.
latchup Coupled BJT model Ebers-Moll model thyristor power MOSFET switching converter
Ye Li Xiaohan Gong Weiwei Xu Zhiliang Hong Dirk Killat
State Key Laboratory of ASIC and System,Fudan University,Shanghai,PRC Dialog Semiconductor,Kirehheim-Tech,Germany
国际会议
2009 IEEE 8th International Conference on ASIC(第八届IEEE国际专用集成电路大会)
长沙
英文
1035-1038
2009-10-20(万方平台首次上网日期,不代表论文的发表时间)