A Nonlinear Phase Frequency Detector for Fast-Lock Phase-Locked Loops

摘要：

A new nonlinear phase frequency detector (PFD) is presented in this paper.When the phase error is not less than π,the proposed PFD has a constant output and so a nonlinear gain to accelerate the lock acquisition of a phase locked loop (PLL);when the phase error is less than π,the proposed PFD has a linear gain just like the conventional PFD to make the PLL maintain a proper loop bandwidth for low output jitter. A circuit embodiment of the proposed PFD, which uses the same amount of transistors as the conventional PFD circuit does,is also presented Circuit simulation results show that the proposed PFD circuit accelerates the lock acquisition of a test bench PLL by about 20% and achieves an operating frequency ranging from IMHz to 2GHz.

关键词： Phase frequency detector PFD phase-locked loop PLL

作者: Jinbao Lan Fengchang Lai Zhiqiang Gao Hua Ma Jianwei Zhang

作者单位: Microelectronics Center,School of Astronautics,Harbin Institute of Technology,Harbin 150001,China Department of Electronics and Information Engineering,Shenzhen Graduate School,Harbin Institute of T

会议类型: 国际会议

会议名称: 2009 IEEE 8th International Conference on ASIC(第八届IEEE国际专用集成电路大会)

会议地点: 长沙

会议语种:英文

页码: 1117-1120

在线出版日期: 2009-10-20（万方平台首次上网日期，不代表论文的发表时间）