True Single-Phase Energy Recovery Flip-Flop for Low-Power Application

In this paper,we present a true single-phase energy recovery flip-flop,which can cascade with conventional combinational logic circuits.Compared with the conventional flip-flop,the true single-phase energy recovery flip-flop exhibits a power reduction of up to 31% at frequency of 200MHz and operating voltages of 1.2V in 0.18μm process.In order to validate the function of energy recovery flip-flop,a chip was designed with 0.18μm process.
Energy recovery flip-flop low power circuits adiabatic true single-phase clocking
Leisheng Gao Yumei Zhou Hainan Liu
Institute of Microelectronics of Chinese Academy of Sciences,Beijing,100029,Peoples Republic of China
国际会议
2009 IEEE 8th International Conference on ASIC(第八届IEEE国际专用集成电路大会)
长沙
英文
1173-1176
2009-10-20(万方平台首次上网日期,不代表论文的发表时间)