A 200MHz Low-Power Direct Digital Frequency Synthesizer Based on Mized Structure of Angle Rotation

摘要：

Direct digital frequency synthesizer(DDS) is a new technology for frequency synthesis. This paper describers the implementation of a direct digital frequency employs a new architecture in 0.35μm CMOS technology. The first rotation implementer by using a CORDIC realized in pipeline and carry-save arithmetic. The directions of the CORDIC rotations are computed in parallel by using a little lookup table,for the first rotation.In order to reduce the circuit latency and increase the speed,the final rotation is multiplier based,employing CMOS-DPL logic. The final circuit experiment results show the power dissipation as low as 1.44mW/MHz and the maximum clock frequency 200 MHz.

关键词： Direct digital frequency synthesizer (DDFS) CORDIC algorithm pipeline angle rotation

作者: Wan Shuqin Huang Yiding Zhang Kai-hong Yu Zongguang

作者单位: School of Information Engineering,Jiangnan University,Wuxi,CO 214000,CHN Physics & Electronic Engineering College,Nanyang Normal University,Nanyang,Henan,CO 473000,CHN China Electronics Technology Group Corporation No.58 Research Institute,Wuxi,Jiangsu CO 214000,CHN

会议类型: 国际会议

会议名称: 2009 IEEE 8th International Conference on ASIC(第八届IEEE国际专用集成电路大会)

会议地点: 长沙

会议语种:英文

页码: 1177-1180

在线出版日期: 2009-10-20（万方平台首次上网日期，不代表论文的发表时间）