A Jitter Measurement Circuit Based On Dual Resolution Vernier Oscillator

摘要：

This paper presents a new on-chip jitter measurement circuit based on a dual vernier oscillator (VO) structure. The new structure measures the jitter with a low resolution VO first and then with a high resolution VO,thus greatly expanding the measurement range of the jitter and reducing the test time. The oscillators are implemented with differential digital controlled delay elements,whose oscillation periods can be precisely controlled. The circuit has been implemented and verified with the SMIC 0.18μm technology and has been shown to have the ability of measuring jitters in the picosecond range.

关键词： timing jitter on-chip vernier oscillator jitter measurement

作者: Wei Tang Jianhua Feng Chunglen Lee

作者单位: Department of Microelectronics,the Key Laboratory of Integrated Microsystems in Shenzhen,Peking Univ College of Electrical and Computer Engineering,National Chiao Tung University,Taiwan

会议类型: 国际会议

会议名称: 2009 IEEE 8th International Conference on ASIC(第八届IEEE国际专用集成电路大会)

会议地点: 长沙

会议语种:英文

页码: 1213-1216

在线出版日期: 2009-10-20（万方平台首次上网日期，不代表论文的发表时间）