The verification of the substrate mathematics model and Optimization of the substrate noise Canceling Technique in mized signal ICs
The substrate noise becomes more serious with the increasing frequency and decreasing process geometries. In this paper,a mathematics model of the substrate noise will be proposed The current methods for solving the substrate noise will be analyzed using the model,and a new method is proposed based on the inverse relationship between the varying voltage of the power supply line and the one of ground line.In this method,there are two important units, which are high-pass filter and adder circuit. The noise is reduced by 26dB,compared with triple-well techniques.
auto-compatibility substrate noise di/dt detector adder circuit triple-well
Dongfang Cheng Wenrong Yang Jiongming Wang
Microelectronic Research & Development Center,Shanghai University,Shanghai 200072,P.R.China
国际会议
2009 IEEE 8th International Conference on ASIC(第八届IEEE国际专用集成电路大会)
长沙
英文
1260-1263
2009-10-20(万方平台首次上网日期,不代表论文的发表时间)