The Application of Automatic Gating Clock in SoC Clock Network
This paper makes research on automatic gating clock technology in SoC clock network. Based on SoC1000 CPU core, analyze the characters of its inner time logiC and combine ASIC physical design flow and method based on standard unit. This paper puts forward a clock network scheme based on precise credible time analysis. This method can greatly reduce SoC clock dissipation and at the same time, it can improve time performance and enlarge chips area.
Automatic gating Soc network ASIC
Tao Li Yilei Wang Shixiang Jia
The department of computer science & technology Ludong University Yantai China The Network Center Ludong University Yantai China
国际会议
2009 9th International Conference on Electronic Measurement & Instruments(第九届电子测量与仪器国际会议 ICEMI2009)
北京
英文
2163-2167
2009-08-16(万方平台首次上网日期,不代表论文的发表时间)