Calibration Method of Teradyne J750 SOC Test System

摘要：

The Teradyne model J750 System on Chip (SOC) test system is one of the most important Integrated circuit(IC) test systems and used widely in the semiconductor manufacture. The J750 is a 512 or 1024 channel test system, contained entirely in the test head. It is difficult to find if the accuracy of J750 is controlled during the maximum permissible error, since the function and the structure of J750 is complicated and the specification of J750 includes many parameters. In this paper, a calibration method of J750 SOC test system described here resolved the traceability problem of J750, and it is also a recommended calibration method of other SOC test system, such as Teradyne Flex, Verigy 93K, Credence sapphire, etc.

关键词： SOC test system calibration method traceability

作者: Han Wang Zhao Zhao Rongxin Xing Jie Li

作者单位: China Electronics Standardization Institute An Ding Men East Street No.1,100007,Beijing,China

会议类型: 国际会议

会议名称: 2009 9th International Conference on Electronic Measurement & Instruments(第九届电子测量与仪器国际会议 ICEMI2009)

会议地点: 北京

会议语种:英文

页码: 2462-2465

在线出版日期: 2009-08-16（万方平台首次上网日期，不代表论文的发表时间）