High-speed Real-time Data Acquisition System Based on FPGA

摘要：

High-speed data acquisition system is designed with the FPGA device EP2S180 as controlling unit. In order to heighten data acquisition speed, four pipelined architecture high-speed AD devices is adopt acted on the state machine and phase delay clock which is designed based on FPGA device. The conversion storage data in the coach composed of Block RAM in the EP2S180 is transferred to main memory by the DDR controller. The DDR controller is also designed based on FPGA device. The frequency of the data acquisition system can reach 700 MHz, and carry on data acquisition real time.

关键词： FPGA High-speed data acquisition Data conversion storage.

作者: Jinqiu Xiao Xinglong Wang Yi Feng

作者单位: Modern Electrical Technology Institute,University of Science & Technology of Suzhou,Suzhou,215011,China

会议类型: 国际会议

会议名称: 2009 9th International Conference on Electronic Measurement & Instruments(第九届电子测量与仪器国际会议 ICEMI2009)

会议地点: 北京

会议语种:英文

页码: 3606-3609

在线出版日期: 2009-08-16（万方平台首次上网日期，不代表论文的发表时间）