Hardware/Software Codesign of Resource Constrained Real-Time Systems
System-level design methods can provide a systematic and effective way of evaluating various design options, thus shortening the product development time. This paper relaxes the HC algorithm by considering the K best candidates in each clustering iteration to alleviate the possibility of being trapped in local minimum during hardware/software (HW/SW) partition. We also present an architecture mapping algorithm together with the defined sensitivity measure to further reduce the hardware requirement. Simulation results show that the complexity of exploration time can be greatly reduced with only little performance loss as compared to the exhaustive search. The proposed algorithm can thus provide a good compromise between exploration time and accuracy.
hardware/software co-design architecture mapping hierarchical clustering implement bin
Chia-Cheng Lo Jung-Guan Luo Ming-Der Shieh
Electrical Engineering Department National Cheng Kung University No.1,Ta-Hseuh Road,Tainan 70101,Taiwan
国际会议
The Fifth International Conference on Information Assurance and Security(第五届信息保障与安全国际会议)
西安
英文
177-180
2009-08-18(万方平台首次上网日期,不代表论文的发表时间)