Power Supply Analysis in Package and SiP Design
This paper introduces a process that allows customers to do package power integrity (PI) analysis on the package side. The chip information such as the die circuits and current profiles as well as power delivery network circuit can be used at the board level to perform PI analysis. The die current profiles are used to obtain the target impedance. For the complicated package geometry structure, the 3D electromagnetic field solver is used to extract the package power supply model. In order to meet the target impedance, the required decoupling capacitors and location can be analyzed and placed according to the transfer impedance in frequency domain. The user can use the voltage ripples in time domain on power and ground nets for a direct verification process.
Wenliang Dai
Cadence Design Systems, Inc. Floor 5, Building 8, No.690, Bibo Road, Pudong, Shanghai, 201203, P.R.China
国际会议
北京
英文
175-178
2009-08-10（万方平台首次上网日期，不代表论文的发表时间）