A Method to Produce Printed Circuit Boards with Embedded Semiconductors Using Stress Buffer Layers
In the case of embedded chip type CSPs (Chip Scale Packages) made by embedding chips in PCBs (Printed Circuit Boards), problems occur due to differences in the CTE (Coefficient of Thermal Expansion) between the PCBs and the chips. This study tested a method to solve this problem by inserting thermal SBLs (Stress Absorbing Layers) into the embedded chips, thereby improving the reliability of the connection between the chip and the PCB. This study focused on a production method used to form a SBL on a Silicon Active Layer in order to make embedded PCBs and the material used as SBLs was absorbent in the polyimide family, which was composed of a material containing at least 30％ polysiloxanes. For the experiment, two types of samples were used, including: 20mm×20mm sized silicon active layers without any SBL formed on them; those with an SBL formed only on the top surface. The samples were produced and placed on the PCBs. To examine the effects of the physical damage, 3 point bending tests were conducted and the results were analyzed.
Won Seo Young-Mo Koo Se-Hoon Park Nam-Ki Kang Gu-Sung Kim
Kangnam University, Yongin 446-702, Korea EPWorks Co., Ltd., ESIP Lab., Gyeonggi 464-070, Korea Korea Electronics Technology Institute, Gyeonggi 463-816, Korea
国际会议
北京
英文
544-547
2009-08-10（万方平台首次上网日期，不代表论文的发表时间）