Indium Bump Fabricated with Electroplating Method

摘要：

Indium solderbumps are usually used in interconnection between focal plane arrays (FPAs) and Si read out integrated circuits (ROICs) by flip-chip bonding. The fabrication of indium bump array is a critical technology in this process. In this paper, the 16×16 indium bump array was fabricated by electroplating method. The indium bump is 100μm in pitch and 40μm in diameter. Lift-off method and IBE process were adopted to try to remove the seed layer. Ti/Pt/Au(200(A)/300(A)/800(A)) by sputtering method and Ti/Pt/Au/ep Au(200(A)/300(A)/800(A) /3-4μm) by electroplating after sputtering were investigated as UBM (under bump metallization) of indium bump. The reliability of indium bumps with different UBM was evaluated by cross-section analysis and shear test.

作者: Qiuping Huang Gaowei Xu Le Luo

作者单位: ShangHai Institute of Microsystem and InformationTechnology, Chinese Academy of Sciences,Shanghai, C ShangHai Institute of Microsystem and InformationTechnology, Chinese Academy of Sciences, Shanghai,

会议类型: 国际会议

会议名称: 2009 International Conference on Electronic Packaging Technology & High Density Packaging(2009 电子封装技术与高密度集成技术国际会议)

会议地点: 北京

会议语种:英文

页码: 650-654

在线出版日期: 2009-08-10（万方平台首次上网日期，不代表论文的发表时间）