The Design of Low Noise Amplifier with Gain-controlled and Low Power Consumption for WLAN Applications

摘要：

This paper presents a 5.2 GHz, 0.18 μm CMOS Low-Noise Amplifier (LNA) with gain controlled and low power consumption for an IEEE 802.11a WLAN application. The LNA fabricated with TSMC 0.18 μm 1P6M standard CMOS process, the current-reuse technique is used to increase the gain and reduce power consumption. The circuit performance is measured by using on-wafer test. The LNA exhibits a noise figure 2.94 dB at 5.2 GHz, the maximum power gain of 13.6 dB, the gain control range is 5 dB, and the power consumption of 4.2mW at VDD=1.8 V. The finished chip size is 1.0mm×0.9 mm.

作者: Pou-Tou Sun Shry-Sann Liao Hung-Liang Lin Chung-Fong Yang Tzu-Wei Yang

作者单位: RF/MW Circuits Design Laboratory,Department of Communication Engineering Feng-Chia University,100,Wen-Hua Rd.,Taichung 407,Taiwan,R.O.C.

会议类型: 国际会议

会议名称: Progress in Electromagnetics Research Symposium 2009(2009年电磁学研究新进展学术研讨会)(PIERS 2009)

会议地点: 北京

会议语种:英文

页码: 906-910

在线出版日期: 2009-03-23（万方平台首次上网日期，不代表论文的发表时间）