Investigations on the Impact of the Parasitic Bottom Transistor in Gate-All-Around Silicon Nanowire SONOS Memory Cells Fabricated on Bulk Si Substrate

摘要：

Gate-all-around (GAA) Si nanowire SONOS memory cells (SNWMs) have been fabricated on Si substrate using fully epi-free compatible CMOS technology. A parasitic bottom SONOS memory (PBM) was formed when the SNWM was fabricated on bulk Si substrate. The impact of the PBM on the performance of the SNWM is investigated in this paper. The PBM shows a slower program speed, a faster erase speed, and worse retention characteristics than the SNWM. Therefore, the PBM severely degrades the performance of the SNWM due to its slower program speed and worse retention characteristics, and should be carefully controlled for the SNWM based on bulk Si substrate.

作者: Yujie Ai Yangyuan Wang Ru Huang Yiqun Wang Jing Zhuge Dake Wu Runsheng Wang Poren Tang Lijie zhang Zhihua Hao

作者单位: Institute of Microelectronics,Peking University,Beijing 100871,P. R. China

会议类型: 国际会议

会议名称: ISTC/CSTIC2009中国国际半导体技术研讨会

会议地点: 上海

会议语种:英文

页码: 99-104

在线出版日期: 2009-03-19（万方平台首次上网日期，不代表论文的发表时间）