De-embedding Techniques for Passive Components Implemented on a 0.25 μm Digital CMOS Process

摘要：

On wafer measurement and characterization of passive components implemented on CMOS technology is one of the initial activities in implementing RF circuits on CMOS. Using test fixtures is necessary in order to test inductors and capacitors at GHz frequencies. However, these fixtures introduce significant effects on measured parameters. This study focuses on the OPEN and THREE step de-embedding techniques used for on wafer measurement of passive devices. different values of inductors and capacitors were used as devices under test (DUT). For each component type, a set of structures for the two de-embedding were fabricated. All of these structures were fabricated on a 0.25 1m Digital CMOS process.

作者: Marc D. Rosales Honee Lyn Tan Louis P. Alarcon Delfin Jay Sabido IX

作者单位: Department of Electrical and Electronics Engineering University of the Philippines, Diliman, Quezon Ctiy 1101, Philippines

会议类型: 国际会议

会议名称: Progress in Electromagnetics Research Symposium 2007(2007年电磁学研究新进展学术研讨会)(PIERS 2007)

会议地点: 北京

会议语种:英文

页码: 2177-2181

在线出版日期: 2007-03-26（万方平台首次上网日期，不代表论文的发表时间）