Digital part in 915MHz UHF RFID tag
This paper presents a base-band processing module including a memory block for 915MHz UHF RFID tags which accords with ISO/IEC 18000-6 Type B protocol and supports basic mandatory instructions. It has a novel clock generation block to ensure correct working under tough clock conditions. Behavioral model of the module was created with Verilog HDL. The design was simulated and verified with ModelSim SE 6.0 and Altera FPGA platform, respectively. The tag chip was fabricated successfully based on Chartered 0.35μm 3.3V CMOS technology, and the power dissipation of its digital part was about 41.2μW.
RFID tag ISO/IEC 18000-6 protocol Base-band processing
Yujing Feng Wei Zhang Xiaohui Xing
School of Electronic Information Engineering, Tianjin University Tianjin 300072, China
国际会议
北京
英文
122-126
2009-10-27(万方平台首次上网日期,不代表论文的发表时间)