An Improved High-speed RS Encoding Algorithm
Taking RS encoder in CMMB system for example, we proposed an improved algorithm according to the method of bit-parallel multiplier based on dual basis. The new algorithm can achieve a higher rate, and the RS encoder can be applied in a wide range of systems when implemented in FPGA.
RS coding on the dual basis bit-parallel FPGA
Zhigang Ren Dongping Yao
College of Electronic Information Engineering Beijing Jiaotong University Beijing, China
国际会议
北京
英文
541-543
2009-10-27(万方平台首次上网日期,不代表论文的发表时间)