Centralized Control and Distributed Test Scheduler for System-on-a-Chip Test

摘要：

Testing core-based systems is a major challenge. The major factor is that the accessibility of the cores and blocks is greatly reduced. Furthermore, the system designer might have a restricted knowledge of the core internals due to the protection of Intellectual Property(IP) of the cores. This paper proposes an test schedule method for System-on-a-Chip test based on self schedule and parallel BIST for SOC (MBSSP-BIST). The scheduler, Centralized Control and Distributed Test Scheduler, is composed of Test Task Management Unit, Test Request management Unit and Centralized Controller, which are all programs based on the characteristics of SOC under test. This paper also shows the main control flow of the Centralized Controller. The experiment result shows that the test efficiency can be improved by 12.00％～21.90％ compared to the result of the other method.

关键词： System-on-a-Chip Test Scheduler

作者: Danghui Wang Deyuan Gao

作者单位: Computer Science and Technology College, Northwestern Polytechnical University Xian, P.R.China

会议类型: 国际会议

会议名称: 第八届国际测试技术研讨会(8th International Symposium on Test and Measurement)

会议地点: 重庆

会议语种:英文

页码: 2343-2346

在线出版日期: 2009-08-01（万方平台首次上网日期，不代表论文的发表时间）