Modeling of Conversion Time for CMOS SAR ADC
The successive approximation register (SAR) type is potentially the most accurate ADC circuit. As it takes N cycles for the ADC to complete a conversion, the speed of the converter is limited by the output settling time of the DAC and the time needed by the comparator to resolve the input difference in each 1-bit cycle. In this paper, the effects that influence the speed of the ADC are president, the model of the conversion time for the ADC is set up, and guides for the circuit designers to realize quick design are provided.
SAR ADC DAC Conversion Time
XIU Limei LU Ming LI Zheying
Institute of Micro-electronic Application Tech, Beijing Union University, Beijing, 100101, China
国际会议
第八届国际测试技术研讨会(8th International Symposium on Test and Measurement)
重庆
英文
3089-3092
2009-08-01（万方平台首次上网日期，不代表论文的发表时间）