The Application of On-chips Integrated Buffer in Recorder
With the increasingly complicated of the testing environment, more and more acquisition parameters are needed. Acquisition unit of the recorder acquires the analog signals which are exported by many sensors. But recently, the speed of writing for solid-state memory device FLASH is low. This paper presents synchronous high-speed buffer integrated in FPGA which can achieve the function of high-speed synchronous data transmission between the acquisition unit and the storage unit by high-speed reading-writing operation of the FIFO.
on-ship FIFO FPGA real-time acquisition synchronous data transmission
LIU Xin LIU Yan
College of Electronics and Information Engineering,Taiyuan University of Science and Technology,Taiy Qingdao Hotel Management Vocational Technology College, Qingdao, Shandong Province, China, 266100
国际会议
第八届国际测试技术研讨会(8th International Symposium on Test and Measurement)
重庆
英文
3236-3239
2009-08-01(万方平台首次上网日期,不代表论文的发表时间)