The FPGA Implementations of AES Resistant to Differential Power Analysis
This paper presents the FPGA implementation of the Advanced Encryption Standard (AES) with masking countermeasure for the differential power analysis (DPA) attacks. DPA is a powerful side-channel analysis (SCA) attack. A side-channel analysis (SCA) attack takes advantage of implementation specific characteristics to recover the secret parameters involved in the computation. The goals of side-channel attack countermeasures are reducing the correlation between the side-channel data and the secret data. Data masking is one of the most powerful countermeasures against side channel attacks. The message and the key are masked with some random values at the beginning of computations. We have implemented the AES algorithm on an FPGA by using masking method.
AES Masking Differential Power Analysis Attacks
ZOU Cheng ZHANG Peng ZHAO Qiang
Department of Computer Engineering, Ordnance Engineering College, Shijiazhuang, Hebei, 050003, China
国际会议
第八届国际测试技术研讨会(8th International Symposium on Test and Measurement)
重庆
英文
3396-3399
2009-08-01（万方平台首次上网日期，不代表论文的发表时间）