An Improved Equalization Circuit for 10-Gb/s High-Speed Serial Transmission over Backplane Channel

摘要：

This paper presents an improved equalization circuit, with a linear equalizer (LE) and a decision feedback equalizer (DFE) in the receiver, for 10-Gb/s high-speed serial data transmission over highly lossy electrical backplane channels. Although DFE provides an effective way to compensate various channel impairments, the pre-cursor inter-symbol interference (ISI) is still a significant problem for channel equalization. With the new equalization method, the pre-cursor ISI is compensated with the linear equalizer, and the post-cursor ISI is cancelled by the DFE. The improved equalization circuit with programmable linear equalizer and a 3-tap DFE is implemented to work at 10-Gb/s and compensate the channel loss of -20 dB. The results show it outperform a traditional 5-tap DFE in vertical eye-opening.

作者: Tad Kwasniewski

作者单位: Department of Electronics, Carleton University, 1125 Colonel By Dr., Ottawa, ON, K1S 5B6, Canada

会议类型: 国际会议

会议名称: 2009国际通信电路与系统学术会议(ICCCAS 2009)(2009 International Conference on Communications，Circuits and Systems)

会议地点: 成都

会议语种:英文

页码: 369-372

在线出版日期: 2009-07-23（万方平台首次上网日期，不代表论文的发表时间）