A Digital Background Calibration Algorithm Based on Code Occurrence Count for Pipelined ADCs

摘要：

This paper proposes a digital background calibration algorithm for pipelined analog-to-digital converters (ADCs). The algorithm doesn’t modify pipeline stages and only needs simple calibration logic. Based on the analysis of the output codes, the algorithm estimates the bit weight of each stage and calculates the outputs. To verify the algorithm, a 13-bit pipelined ADC with 1.5-bit/stage architecture is simulated with nonideal factors such as random capacitor mismatch, comparator offset, finite opamp gain, opamp noise and opamp offset taken into account. SNDR is improved from 43.9dB to 76.5dB. Monte Carlo simulation result demonstrates the algorithm is robust to random circuit parameters.

作者: Weitao Li Fule Li Chun Zhang Zhihua Wang

作者单位: Institute of Microelectronics/Tsinghua University/Beijing, China

会议类型: 国际会议

会议名称: 2009国际通信电路与系统学术会议(ICCCAS 2009)(2009 International Conference on Communications，Circuits and Systems)

会议地点: 成都

会议语种:英文

页码: 550-553

在线出版日期: 2009-07-23（万方平台首次上网日期，不代表论文的发表时间）