Representing Topological Structures for 3-D Floorplanning
3-D VLSI circuit is becoming a hot topic because of its potential of enhancing performance, while it is also facing challenges such as the increased complexity on floorplanning and placement. Efficient 3-D floorplan representations are needed to handle the placement optimization in new circuit designs. We review and categorize some state-of-the-art 3-D representations, and propose a twin quaternary tree (TQT) model for 3-D mosaic floorplans, extending the twin binary tree 16. Differences between 2-D and 3-D mosaic floorplans are discussed and some 3-D properties not existing in 2-D are revealed. Though the efficiency of the twin tree for optimization heuristics is still an open question, insights from the discussions and conclusions can be helpful for 3-D physical design.
Renshen Wang Evangeline F.Y.Young Chung-Kuan Cheng
University of California, San Diego, La Jolla, CA 92093-0404 The Chinese University of Hong Kong, Shatin, NT, Hong Kong
国际会议
2009国际通信电路与系统学术会议(ICCCAS 2009)(2009 International Conference on Communications,Circuits and Systems)
成都
英文
1098-1102
2009-07-23(万方平台首次上网日期,不代表论文的发表时间)