会议专题

QuteVP: A Multi-Million-Instructions-per-Second Virtual Platform for SoC Hardware/Software Co-Design

In this paper, we proposed and implemented a virtual platform, QuteVP, that can simulate multi-million-instructions per second under the cycle-count accurate model. This is achieved by two major contributions: first, we devised a Data-dependency Aware Virtual Synchronization Algorithm (DAVSA) to eliminate the unnecessary context switches in the simulation process, and second, we simplify the OS porting process by building the OS kernel image directly and specifically for the virtual platform. The experimental results show that our virtual platform can execute on the average 3 to 5 million instructions per second and bring up the uCLinux OS within just about 10 seconds. With the high performance simulation engine and the flexible OS porting, our QuteVP will serve as a very solid platform for the future SoC hardware/software co-design paradigm.

Kuen-Huei Lin Yuan-Lung Li Yufu Yeh Chung-Yang (Ric) Huang

Graduate Institute of Electronics Engineering, National Taiwan University,Taiwan China

国际会议

2009国际通信电路与系统学术会议(ICCCAS 2009)(2009 International Conference on Communications,Circuits and Systems)

成都

英文

1144-1148

2009-07-23(万方平台首次上网日期,不代表论文的发表时间)