A Register Allocation Algorithm Based On Predicate Analysis System

摘要：

In order to allocate registers efficiently for predicated code, a new algorithm based on Predicate Analysis System is presented, which uses binary decision diagrams for constructing refined interference graph. The algorithm is implemented in the compiler of XXX-DSP/700 chip developed byour college. Experiment results show that the number of used registers is reduced 24.51％ evenly, and the average speedup of code execution time reaches 1.31.

关键词： Register Allocation Predicated Ezecution Predicate Analysis DSP Binary Decision Diagram

作者: WANG Fengqin LI Ying ZHANG Zhengxia

作者单位: Department of Ordnance Science and Technology Naval Aeronautical Engineering Institute Yantai, ShanDong Province, China

会议类型: 国际会议

会议名称: 2009 WASE International Conference on Information Engineering(2009年国际信息工程会议)(ICIE 2009)

会议地点: 太原

会议语种:英文

页码: 737-740

在线出版日期: 2009-07-10（万方平台首次上网日期，不代表论文的发表时间）