Matching High and Low Side MOSFETs to Minimize Losses in Synchronous Buck DC-DC Converters

摘要：

This paper focuses on the selection criteria for matching the high side (control) and low side (synchronous) power MOSFETs in low voltage synchronous buck converters. It discusses the high side and low side interaction and determine the key attributes leading towards a high-efficiency converter design. Analysis of MOSFET switching transitions is provided along with practical examples for determining excessive switching losses for both high and low side MOSFETs. Moreover, the switching waveforms will be analyzed with the aid of TCAD simulations. This will provide valuable insight into how the MOSFET packaging inductance influences lab measurements such as the low side MOSFET gate-source bounce and drain-to-source voltage stress.

作者: Jon Gladish Bill Choi Jeongil Lee

作者单位: Fairchild Semiconductor, USA Fairchild Semiconductor, Korea

会议类型: 国际会议

会议名称: The Eighth International PCIM China(第八届电子功率器件、智能传送、电源质量国际研讨会)

会议地点: 上海

会议语种:英文

页码: 142-147

在线出版日期: 2009-06-02（万方平台首次上网日期，不代表论文的发表时间）