FPGA & ASIC Implementation of Differential Power Analysis Attack on AES

摘要：

Advanced Encryption Standard (AES) is a new block cipher standard adopted by U.S. government. Differential Power Analysis (DPA) attack based on correlation coefficient is an effective method to attack the cryptographic device and extract the secret key. Recently, more and more people have become interested in this researching area. In this paper, we built an experiment environment of AES encryption and Correlation DPA attack. We carried out the attack on both FPGA and ASIC board. According to the experiment result, we analyzed the effectiveness and correctness of attack on the two boards. Furthermore, we compared the power data consumed by FPGA and ASIC, and described it in details. Our approach is also the first step to link the effect of attack to the detailed power consumption measurements.

关键词： AES Power analysis attack Correlation DPA SASEBO-G SASEBO-R

作者: Guoyu Qian Yibo Fan Yukiyasu Tsunoo Takeshi Ikenaga Satoshi Goto

作者单位: Graduate School of Information, Production and Systems, WASEDA UNIVERSITY, 2-7, Hibikino, Wakamatsu- Internet Systems Research Laboratories, NEC Corp.Kawasaki-shi, 211-8666, Japan

会议类型: 国际会议

会议名称: Fourth International Conference，Inscrypt 2008(第四届中国密码学与信息安全国际会议)

会议地点: 北京

会议语种:英文

页码: 111-130

在线出版日期: 2008-12-01（万方平台首次上网日期，不代表论文的发表时间）