Reduced Rating Improved Topology Electronic Ballast with Low Switching Losses Using an Auziliary High Frequency Diode
(0) An improved topology of a voltage-fed quasi-resonant soft switching LCr Cdc series-parallel inverter with a constant-frequency for electronic ballast applications is proposed in this paper. This new topology introduces a low-cost solution to reduce switching losses and rating to achieve high-efficiency ballast. Switching losses effect on ballast efficiency is discussed through experimental point of view. In this discussion, an improved topology in which accomplishes soft switching operation over a wide power regulation range is proposed. A symmetrical pulse wide modulation (PWM) control scheme is implemented to regulate a wide range of out-put power. Simulation results are kindly verified with the experimental measurements obtained by ballast-lamp laboratory prototype. Different load conditions are provided in order to clarify the performance of the proposed converter.
S.H.Hosseini H.Mehran Sabahi Ali Yazdanpanah Goharrizi
Center of Excellence for Mechatronics, University of Tabriz, Tabriz, Iran Faculty of Elec.And Comp.Eng., University of Tabriz, Tabriz, Iran
国际会议
The Seventh International PCIM China(第七届电子功率器件、智能传送、电源质量国际研讨会)
上海
英文
177-181
2008-03-18（万方平台首次上网日期，不代表论文的发表时间）