A Fast Performance Analysis Tool for Multicore, Multithreaded Communication Processors
To allow fast communication processor (CP)performance testing of task-to-CP-topology mapping,we propose a fast CP simulation tool with a few novel ideas that make it generic, fast, and accurate. Our major goal is to focus on modeling features common to a wide variety of CP architectures and incorporate relevant CP specific features as plug-ins. This tool not only allows user-defined packet arrival processes and code path mixtures to be tested, but also provides a way to allow the maximum sustainable line rate to be quickly estimated. Case studies based on a large number of code samples available in IXP1200/2400workbenches show that the maximum sustainable line rates estimated using our tool are consistently within 6% of cycle-accurate simulation results. Moreover,each simulation run takes only a few seconds to finish on a Pentium III PC, which strongly demonstrates the power of this tool for fast CP performance testing.
Hun Jung Miao Ju Hao Che Zhijun Wang
Department of Computer Science and Engineering University of Texas at Arlington Department of Computing Hong Kong Polytechnic University, Hong Kong
国际会议
11th IEEE High Assurance Systems Engineering Symposium(HASE 2008)(第十一届IEEE高可信系统工程国际研讨会)
南京
英文
135-144
2008-12-03（万方平台首次上网日期，不代表论文的发表时间）