Low Dissipation Nanoscale Transistor Physics and Operations

摘要：

Power dissipation has recently overtaken performance as the most important challenge in scaling nanoscale transistors. In this paper, we have proposed and preliminarily analyzed novel device concepts to reduce both the off-state leakage dissipation as well as the dynamic power consumption. The off-state leakage can be selectively suppressed using a wide bandgap drain heterojunction architecture.On the other hand, the dynamic power can be reduced using an asymmetric gate biasing scheme.We have also discussed the enabling device physics and operating principles.

作者: Chi On Chui Kun-Huan Shih Kaveh Shoorideh

作者单位: Electrical Engineering Department, University of California, Los Angeles, CA 90095, U.S.A

会议类型: 国际会议

会议名称: 9th International Conference on Solid-State and Integrated-Circuit Technology(第9届固态和集成电路国际会议)

会议地点: 北京

会议语种:英文

页码: 29-32

在线出版日期: 2008-10-20（万方平台首次上网日期，不代表论文的发表时间）