Prediction of Channel Thermal Noise in Twin Silicon Nanowire MOSFET (TSNWFET)
In this work, channel thermal noise in the twin silicon nanowire MOSFET (TSNWFET) is predicted using analytic thermal noise model taking into account short channel effects. TSNWFET used in this work has 40 nm gate length, 5 nm radius of silicon wire, and the 3.5 nm of gate oxide.Predicted thermal noise is compared with that of the planar MOSFET using various processes.
Jaehong Lee Jongwook Jean Junsoo Kim Byung-Gook Park Jong DukLee Hyungcheol Shin
Nano Systems Institute, Inter-University Semiconductor Research Center (ISRC) and School of Electrical Engineering,Seoul National University, Sillim-dong, Gwanak-gu, Seoul, 151-742, Republic of Korea
国际会议
9th International Conference on Solid-State and Integrated-Circuit Technology(第9届固态和集成电路国际会议)
北京
英文
61-63
2008-10-20(万方平台首次上网日期,不代表论文的发表时间)