Novel MOSFET Structures for RF Applications
Rising demand for computing, mobile and telecommunication applications has fueled increasing efforts to integrate analog and digital functions on a single chip to create System-on-Chip (SOC) type applications. To improve RF performance of devices alternate structures must be explored to overcome problems such as degrading Rout and gain, parasitics, noise and linearity. Towards this end, novel asymmetric Tunneling Source SOI-MOSFETs are proposed in this paper. The main feature of these devices is the concept of gate controlled carrier injection through tunneling at the source junction. The tunneling source MOSFETs can be fabricated using conventional CMOS processes.Compared to conventional SOI MOSFETs, these novel devices show excellent short channel immunity which improves scalability into sub-50nm regime and make them an attractive candidate for analog operations.
Ritesh Jhaveri N.V Girish Jason Woo
Department of Electrical Engineering, University of California Los Angeles 54-121 Engineering IV Bldg., 420 Westwood Plaza, Los Angeles, CA 90095, USA
国际会议
9th International Conference on Solid-State and Integrated-Circuit Technology(第9届固态和集成电路国际会议)
北京
英文
76-79
2008-10-20（万方平台首次上网日期，不代表论文的发表时间）