Towards Schottky-Barrier Source/Drain MOSFETs

摘要：

This paper provides an overview of metal source/drain (S/D) Schottky-barrier (SB) MOSFET technology. The technology offers several benefits for scaling CMOS, i.e., extremely low source/drain resistance, sharp junctions.from S/D to channel and low temperature processing.A successful implementation of the technology needs to overcome new obstacles such as SB height engineering and precise control of silicide growth.Device design factors such as S/D to gate underlap, Si film thickness and oxide thickness affect device performance owing to their effects on the SB width. In the past two years several groups have demonstrated high-performance SB MOSFETs, which places the technology as a promising candidate for future generations of CMOS technology.

作者: Mikael (O)stling Valur Gudmundsson Per-Erik Hellstr(o)m B.Gunnar Malm Zhen Zhang Shi-Li Zhang

作者单位: School of Information and Communication Technology, Royal Institute of Technology (KTH),Electrum 229 Present address: IBM Thomas J.Watson Research Center, Yorktown Heights, NY 10598, USA

会议类型: 国际会议

会议名称: 9th International Conference on Solid-State and Integrated-Circuit Technology(第9届固态和集成电路国际会议)

会议地点: 北京

会议语种:英文

页码: 146-149

在线出版日期: 2008-10-20（万方平台首次上网日期，不代表论文的发表时间）