Electrostatic Discharge Protection Framework for Mized-Signal High Voltage CMOS Applications

摘要：

Electrostatic discharge (ESD) protection requirements for high voltage (HV) MOS technology are continuously evolving and increasingly stringent. To address the ever changing technology ESD constraints,a method for design,characterization,and integration of reliable mixed-signal HV MOS ESD solutions is introduced in this study. The dynamic response,design trade-offs and ESD verification in two HV CMOS-based technologies are discussed and depicted via fast transient and quasi-static measurements in the ESD-time domain.

作者: Javier A Salcedo Haiyang Zhu Alan W.Righter Jean-Jacques Hajjar

作者单位: Analog Devices,Wilmington,Massachusetts 01887,USA

会议类型: 国际会议

会议名称: 9th International Conference on Solid-State and Integrated-Circuit Technology(第9届固态和集成电路国际会议)

会议地点: 北京

会议语种:英文

页码: 329-332

在线出版日期: 2008-10-20（万方平台首次上网日期，不代表论文的发表时间）